domingo, 17 de mayo de 2015

Xilinx MIG for spartan 6 example

This is an example about how to use the Xilinx Memory Interface Generator for Spartan 6 in an sp605 board.

Although the documentation is very clear, there are not many simple examples available on internet, so I'm publishing this one that is very straightforward: and mig instance is generated with two ports, one port for reading and another port for writing. For writing, data is fetched from a switch and a button triggers the write operation. For reading, a button queues a read operation and, when available, its transferred to a led array. Both operations are done explicitly, so you can debug signals and have a better understanding of the functions.

A few notes about the MIG's core usage:

  • For reading, you queue a read command and wait for the data, If your reading port is c3_p2, use "c3_p2_rd_empty = '0'" as a data valid signal for its data port.
  • For writing, you first write to the data FIFO and just then queue the write command.

Here are the steps for the configuration of the MIG generator:

Source code (vhdl and constraints) can be found here:

Happy coding!

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